24-Bit 5.0 Ghz Direct Digital Synthesizer Rfic With Direct Digital Modulations In 0.13 Mu M Sige Bicmos Technology

IEEE JOURNAL OF SOLID-STATE CIRCUITS(2010)

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摘要
This paper presents a 24-bit 5.0 GHz ultrahigh-speed direct digital synthesizer (DDS) with direct digital modulation capabilities used in a pulse compression radar. This design represents the first DDS RFIC in over-GHz output frequency range with direct digital modulation capabilities. It adopts a ROM-less architecture and has the capabilities for direct digital frequency and phase modulation with 24 bit and 12 bit resolution, respectively. The DDS includes a 24-bit ripple carry adder (RCA) accumulator for phase accumulation, a 12-bit RCA for phase modulation and a 10-bit segmented sine-weighted digital-to-analog converter (DAC) for phase-to-amplitude conversion (PAC) as well as digital-to-analog conversion. The DDS core occupies 3.0 x 2.5 mm(2) and consumes 4.7 W of power with a single 3.3 V power supply. This 24-bit DDS has more than 20,000 transistors and achieves a maximum clock frequency of 5.0 GHz. The measured worst case SFDR is 45 dBc under a 5.0 GHz clock frequency and within a 50 MHz bandwidth. At 1.246258914 GHz output frequency, the 50 MHz narrowband SFDR is measured as 82 dBc. The best Nyquist band SFDR is 38 dBc with a 469.360351 MHz output using a 5.0 GHz clock frequency. This DDS was developed in a 0.13 mu m SiGe BiCMOS technology with f(T)/f(MAX) = 200/250 GHz and tested in a CLCC-68 package.
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关键词
Accumulator, carry look ahead (CLA), digital-to-analog converter (DAC), direct digital synthesizer (DDS), frequency modulation (FM), linear frequency modulation (LFM), phase modulation (PM), pulse compression, radar, ripple carry adder (RCA), ROM-less DDS, sine-weighted DAC, stretch processing
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