Modeling of Semiconductor Nanowire Field-Effect Transistors Considering Schottky-Barrier-Height Lowering

A modeling of a nanowire field effect transistor (FET) considering Schottky barrier height (SBH) lowering is introduced. Because nanowire FETs inevitably involve a metal-semiconductor-metal (M-S-M) structure, they consist of two metal-semiconductor (M-S) contacts and one resistor in between them. Our model includes a thermionic field emission (TFE) mechanism under reverse-bias and a thermionic emission (TE) mechanism under forward bias. Our model can describe SBH lowering not only by drain-source bias but also by gate bias. The results simulated with our model reproduce the experimental results within a maximum error of 1 %.