Memory-to-memory connection structures in FPGAs with embedded memory arrays

    FPGA, pp. 10-16, 1997.

    Cited by: 130|Bibtex|Views15|Links
    EI
    Keywords:
    multiple memory arrayefficient implementationcritical pathmemory-to-memory connection structurelarge embedded memory arrayMore(4+)

    Abstract:

    This paper shows that the speed of FPGAs with large embedded memory arrays can be improved by adding direct programmable connections between the memories. Nets that connect to multiple memory arrays are often difficult to route, and are often part of the critical path of circuit implementations. The memory-to-memory connection structure p...More

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