Least-significant bit optimization techniques for FPGAs.

We present a methodology for FPGA datapath precision optimization subject to user-defined area and error constraints. This work builds upon our previous research which presented a methodology for optimizing for dynamic range--the most significant bit position. In this work we define the problem of least significant bit optimization and propose optimization techniques that provide finer control of area-to-error tradeoffs than more traditional methods. We present some preliminary results describing the effectiveness of our techniques on typical signal and image processing kernels.