Modeling the overshooting effect of multi-input gate in nanometer technologies

Li Ding,Zhangcai Huang,Minglu Jiang,Atsushi Kurokawa,Yasuaki Inoue

Journal of Circuits, Systems, and Computers（2012）

引用 3|浏览6

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摘要

With the advent of nanometer age in digital circuits, the overshooting time becomes a dominating component of gate delay for CMOS logic gates. Till now, few researches have focused on the overshooting effect of multi-input gate. Therefore, in this paper, an effective model considering the overshooting effect of multi-input gate is presented. The experimental results using 32nm PTM model reflect that the proposed model is accurate within 3.6% error compared with SPICE simulation results.

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关键词

spice simulation,logic circuits,digital circuit,overshooting effect,integrated circuit modelling,nanometer technology,cmos ptm model,pulse time modulation,multiinput gate delay,cmos logic gate,cmos logic circuits,size 32 nm,nanoelectromechanical devices

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