A Realistic Study on Multithreaded Superscalar Processor Design

Simultaneous multithreading is a recently proposed technique in which instructions from multiple threads are dispatched and/or issued concur- rently in every clock cycle. This technique has been claimed to improve the latency of multithreaded programs and the throughput of multiprogramm ed workloads with a minimal increase in hardware complexity. This paper presents a realistic study on the case for simultaneous multithreading by using extensive simulations to determine balanced configurations of a multithreaded version of the PowerPC 620, measuring their performance on multithreaded benchmarks written using the commercial P Threads API, and estimating their hardware complexity in terms of increases in die area. Our results show that a balanced 2- threaded 620 achieves a 41.6% to 71.3% speedup over the original 620 on five multithreaded benchmarks with an estimated 36.4% increase in die area and no impact on single thread performance. The balanced 4-threaded 620 achieves a 46.9% to 111.6% speedup over the original 620 with an estimated 70.4% increase in die area and a detrimental impact on single thread performance.