A fully integrated 43.2-gb/s clock and data recovery and 1:4 demux IC in InP HBT technology

S. Nielsen,J. C. Yen,N. K. Srivastava,J. E. Rogers,M. G. Case,R. Thiagarajah

IEEE Journal of Solid-State Circuits（2003）

引用 21|浏览5

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摘要

A 43.2-Gb/s clock and data recovery/demultiplexer (CDR/DMUX) integrated circuit (IC) implemented in InP heterojunction bipolar transistor (HBT) technology is demonstrated. The IC is fully integrated, requiring only a single external capacitor for complete functionality. The IC exceeds extrapolated SONET/SDH jitter tolerance specifications, operates with an industry-standard +3.3-V power supply, an...

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关键词

Clocks,Indium phosphide,Heterojunction bipolar transistors,Integrated circuit technology,Bipolar integrated circuits,Capacitors,SONET,Synchronous digital hierarchy,Jitter,Electricity supply industry

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