Novel Design of Vertical Double-Diffused Metal–Oxide–Semiconductor Transistor for High Electrostatic Discharge Robustness

[Bipolar]-[complementary metal-oxide-semiconductor transistor (CMOS)]-[double-diffused metal-oxide-semiconductor transistor (DMOS)] [BiC-DMOS] devices are widely used in high-voltage applications. As some applications require high electrostatic discharge (ESD) robustness, we studied the vertical DMOS (VDMOS) transistor to improve ESD robustness. In this paper, we propose a balanced VDMOS (B-VDMOS) transistor. A B-VDMOS transistor is optimized for a cell layout to improve current uniformity after avalanche breakdown by arranging a number of sources. As the B-VDMOS transistor can prevent current concentration, it is not destroyed after avalanche breakdown and acquires a high second breakdown current. Owing to the high second breakdown current, the B-VDMOS transistor can improve ESD robustness by 50% according to the human body model (HBM) test compared with a conventional VDMOS (C-VDMOS) transistor. As the B-VDMOS transistor has high ESD robustness, it can be used in harsh applications and systems. (C) 2009 The Japan Society of Applied Physics