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High-quality, deterministic parallel placement for FPGAs on commodity hardware

FPGA, pp.14-23, (2008)

Cited by: 74|Views136
EI

Abstract

In this paper, we describe the application of two parallelization strategies to the Quartus II FPGA placer. The first uses a pipelining approach and achieves speedups of 1.3x on two processing cores. The second uses a parallel moves approach and achieves speedups of 2.2x on four cores. Unlike all previous parallel moves algorithms, ours i...More

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