Timing-driven placement for FPGAs

    FPGA, pp. 203-213, 2000.

    Cited by: 303|Bibtex|Views5|Links
    EI
    Keywords:
    path-based timing-driven placementtiming-driven placementpath-based timing-analysisfull path-based timing-driven routernon-timing-driven placement algorithmMore(15+)

    Abstract:

    In this paper we introduce a new Simulated Annealing-based timing-driven placement algorithm for FPGAs. This paper has three main contributions. First, our algorithm employs a novel method of determining source-sink connection delays during placement. Second, we introduce a new cost function that trades off between wire-use and critical p...More

    Code:

    Data:

    Your rating :
    0

     

    Best Paper
    Best Paper of FPGA, 2000
    Tags
    Comments