An Efficient Algorithm for Finding the K Longest Testable Paths Through Each Gate in a Combinational Circuit

ITC, pp. 592-601, 2003.

Cited by: 131|Views1
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Abstract:

Testing the K longest paths through each gate (KLPG) in a circuit detects the smallest local delay faults under process variation. In this work a novel automatic test pattern generation (ATPG) methodology to find the K longest testable paths through each gate in a combinational circuit is presented. Many techniques are used to significant...More

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