A simple, verified validator for software pipelining
Sigplan Notices, Volume 45, Issue 1, 2010, Pages 83-92.
verified compilerssymbolic evaluationmodulo scheduling algorithmtranslation validationinstruction-level parallelismMore(8+)
Software pipelining is a loop optimization that overlaps the execution of several iterations of a loop to expose more instruction-level parallelism. It can result in first-class performance characteristics, but at the cost of significant obfuscation of the code, making this optimization difficult to test and debug. In this paper, we prese...More