FPGA routing and routability estimation via Boolean satisfiability

    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, pp. 222-231, 1998.

    Cited by: 180|Bibtex|Views21|Links
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    Keywords:
    fpga routingbinary decision diagramcomplete detailed routingperfect routability estimatorboolean satisfiabilityMore(10+)

    Abstract:

    Guaranteeing or even estimating the routability of a portion of a placed FPGA remains difficult or impossible in most practical applications. In this paper we develop a novel formulation of both routing and routability estimation that relies on a rendering of the routing constraints as a single large Boolean equation. Any satisfying assig...More

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