A 159mm2 32nm 32gb MLC NAND-flash Memory with 200mb/s Asynchronous DDR Interface
2010 IEEE International Solid-State Circuits Conference - (ISSCC)（2010）
Key words
NAND circuits,asynchronous circuits,flash memories,nanotechnology,MLC NAND flash memory,asynchronous DDR interface,core memory,data path architecture,double data rate,nanotechnology,program algorithm,size 32 nm,storage capacity 32 Gbit
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