Power-Aware Design Technique For Pac Duo Based Embedded System

Power consumption has been becoming one of the most important criteria for portable embedded devices. During application program development phase to estimate the power consumption is of great significance. In this paper, we propose a power evaluation methodology for PACDSP instruction set simulator. Programmers can easily observe the power consumption during the application development stage. The power modeling is compared with Synopsys PrimeTime PX, and the maximum deviation is less than 4% by executing the BDTI benchmarks. Furthermore, we also discuss the power consumption of the PAC Duo multimedia platform.