PARADE: PARAmetric Delay Evaluation under Process Variation

ISQED, pp. 276-280, 2004.

Cited by: 5|Views1
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Abstract:

Under manufacturing process variation, the circuit delay varies with process parameters. For delay test and timing verification under process variation, it is necessary to model the variational delay as a function of process variables. However, conventional methods to generate such functions are either slow or inaccurate. In this paper, w...More

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