Making Fast Buffer Insertion Even Faster Via Approximation Techniques

ASPDAC(2005)

引用 18|浏览8
暂无评分
摘要
As technology scales to 0.13 micron and below, designs are requiring buffers to be inserted on interconnects of even moderate length for both critical paths and fixing electrical violations. Consequently, buffer insertion is needed on tens of thousands of nets during physical synthesis optimization. Even the fast implementation of van Ginneken's algorithm requires several hours to perform this task. This work seeks to speed up the van Ginneken style algorithms by an order of magnitude while achieving similar results. To this end, we present three approximation techniques in order to speed up the algorithm: (1) aggressive pre-buffer slack pruning, (2) squeeze pruning, and (3) library lookup. Experimental results from industrial designs show that using these techniques together yields solutions in 9 to 25 times faster than van Ginneken style algorithms, while only sacrificing less than 3% delay penalty.
更多
查看译文
关键词
buffer circuits,integrated circuit design,integrated circuit interconnections,aggressive prebuffer slack pruning,approximation technique,buffer insertion,electrical violation,library lookup,physical synthesis optimization,squeeze pruning,van Ginneken algorithm,
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要