HSRA: high-speed, hierarchical synchronous reconfigurable array

    FPGA, pp. 125-134, 1999.

    Cited by: 326|Bibtex|Views18|Links
    EI
    Keywords:
    hierarchical synchronous reconfigurable arraybut there are some good reasons why this myth persists.a common myth about fpgas is that they are inherently 10 slower than processors. we see no physical limitations which would make this truefloorplanninglogic designMore(8+)

    Abstract:

    There is no inherent characteristic forcing Field ProgrammableGate Array (FPGA) or Reconfigurable Computing (RC) Array cycle times to be greater than processors in the same process. Mod- ern FPGAs seldom achieve application clock rates close to their processor cousins because (1) resources in the FPGAs are not bal- anced appropriately for...More

    Code:

    Data:

    Your rating :
    0

     

    Best Paper
    Best Paper of FPGA, 1999
    Tags
    Comments