Hierarchical Concurrent Congestion and Wirelength Estimation in the Presence of IP Blocks
ISVLSI, pp. 213-218, 2007.
post-placement congestion estimation techniqueaverage errorwirelength estimationnew estimation methodconcurrent congestionMore(16+)
With the increasing sophistication of circuits and specifically in the presence of IP blocks, new estimation methods are needed in the design flow of large-scale circuits. Up to now, a number of post-placement congestion estimation techniques in the presence of IP blocks have been presented. We propose a novel stochastic pre-placement app...More
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