SPICE modeling and quick estimation of MOSFET mismatch based on BSIM3 model and parametric tests

IEEE Journal of Solid-State Circuits(2001)

引用 36|浏览15
暂无评分
摘要
This paper reports a MOS transistor mismatch model applicable for submicron CMOS technologies and developed based on the industry standard BSLM3v3 model. A simple and unified expression was derived to formulate the effect of MOSFET mismatch on drain current variance. A way to quickly estimate the drain current mismatch was also suggested. The model has been integrated into HSPICE, and results obta...
更多
查看译文
关键词
SPICE,MOSFET circuits,Testing,Semiconductor device modeling,Semiconductor process modeling,Threshold voltage,Predictive models,Circuit simulation,CMOS technology,Semiconductor device measurement
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要