A Novel Technique For Fast Clock Phase And Frequency Offset Simulation In Digital Communication Systems

In this paper, we present the methodology of a new technique for modeling and very fast simulation of clock offset and frequency mismatch in synchronous communication. The ease with which this technique can be expanded to extract the system parameters is a major objective of this work. This technique utilizes the Lagrange Interpolator to construct the analog received signal and is alleviating the need for very high signal over sampling to simulate symbol recovery. The results from simulating different algorithms with this technique are given. A few results of simulating Mueller and Muller symbol timing recovery is also addressed within the proposed framework.