AI helps you reading Science

AI generates interpretation videos

AI extracts and analyses the key points of the paper to generate videos automatically


pub
Go Generating

AI Traceability

AI parses the academic lineage of this thesis


Master Reading Tree
Generate MRT

AI Insight

AI extracts a summary of this paper


Weibo:
We have described the implementation of a software Virtual Machine Monitor that employs binary translation for x86 guest execution

A comparison of software and hardware techniques for x86 virtualization

Architectural Support for Programming Languages and Operating Systems, no. 11 (2006): 2-13

Cited by: 978|Views191
EI

Abstract

Until recently, the x86 architecture has not permitted classical trap-and-emulate virtualization. Virtual Machine Monitors for x86, such as VMware ® Workstation and Virtual PC, have instead used binary translation of the guest kernel code. However, both Intel and AMD have now introduced architectural extensions to support classical virtua...More

Code:

Data:

0
Introduction
  • The need to virtualize unmodified x86 operating systems has given rise to software techniques that go beyond the classical trapand-emulate Virtual Machine Monitor (VMM).
  • The best known of these software VMMs, VMware Workstation and Virtual PC, use binary translation to fully virtualize x86.
  • The software VMMs have enabled widespread use of x86 virtual machines to offer server consolidation, fault containment, security and resource management.
  • Copyright c 2006 ACM 1-59593-451-0/06/0010. . . $5.00
Highlights
  • The x86 has historically lacked hardware support for virtualization [21]
  • We study architecture-level events such as page table updates, context switches and I/O, and find their costs vastly different among native, software Virtual Machine Monitor (VMM) and hardware VMM execution
  • The need to virtualize unmodified x86 operating systems has given rise to software techniques that go beyond the classical trapand-emulate Virtual Machine Monitor (VMM)
  • We review basic obstacles to classical virtualization of the x86 architecture, explain how binary translation (BT) overcomes the obstacles, and show that adaptive BT improves efficiency
  • We show compiled code fragment (CCF) in textual form with labels like isPrime’ to remind us that the address contains the translation of isPrime, in reality the translator produces binary code directly and tracks the input-to-output correspondence with a hash table
  • We have described the implementation of a software VMM that employs BT for x86 guest execution
Methods
  • The authors have examined a number of 64-bit workloads under VMware Player 1.0.1’s software and hardware-assisted VMMs.
  • Current Intel CPUs lack support for segment limits in 64 bit mode, leaving them without the preferred method for protecting the software VMM.
  • The authors caution that in the measured hardware environment the software VMM fails Popek and Goldberg’s Safety requirement.
  • The VMM exhibits similar performance on AMD’s Opteron processor where 64-bit segment limits are supported, so the authors are confident that these measurements accurately represent the performance of the software VMM.
  • Improvements in software and hardware may change the constants, but the broad profile of the two approaches’ strengths and weaknesses will remain the same
Conclusion
  • The VT and SVM extensions make classical virtualization possible on x86. The resulting performance depends primarily on the frequency of exits.
  • A guest that never exits runs at native speed, incurring near zero overhead.
  • This guest would not be very useful since it can perform no I/O.
  • Reducing the frequency of exits is the most important optimization for classical VMMs.The authors have described the implementation of a software VMM that employs BT for x86 guest execution.
  • Recent hardware extensions permit implementation of a trap-and-emulate hardware VMM that executes guests directly.
  • In two workloads rich in system calls, the hardware VMM prevails
Tables
  • Table1: Micro-architectural improvements (cycles)
Download tables as Excel
Related work
  • Our approach to this topic owes a debt to the long-running RISC vs. CISC debate [6, 18]. This quarrel in its narrow sense has been fought to a draw, with a current abundance of both RISC and CISC designs. However, the controversy’s lasting gifts have been skepticism towards the intuition that hardware always outperforms software, and the consensus that measurement must guide design of the hardware/software interface [11].

    The picoJava microprocessor lands at one end of the hardware/software split [15]. This processor effectively reimplements the software JVM version 1.0 in hardware. While picoJava was never intended as a high performance bytecode execution engine, it is still striking to observe just how differently a modern JVM delivers performance through multi-stage JIT compilation. The picoJava design, frozen in time in the last millenium, is not what one would build today to run Java.
Reference
  • AGESEN, O., AND DETLEFS, D. Mixed-mode bytecode execution. Technical Report SMLI TR-200-87, Sun Microsystems, Inc., Mountain View, CA, USA, 2000.
    Google ScholarFindings
  • AMD. AMD64 Virtualization Codenamed “Pacifica” Technology: Secure Virtual Machine Architecture Reference Manual, May 2005.
    Google ScholarFindings
  • AMSDEN, Z., ARAI, D., HECHT, D., HOLLER, A., AND SUBRAHMANYAM, P. VMI: An interface for paravirtualization. Ottawa Linux Symposium (2006).
    Google ScholarLocate open access versionFindings
  • BALA, V., DUESTERWALD, E., AND BANERJIA, S. Dynamo: a transparent dynamic optimization system. In PLDI ’00: Proceedings of the ACM SIGPLAN 2000 conference on programming language design and implementation (New York, NY, USA, 2000), ACM Press, pp. 1–12.
    Google ScholarLocate open access versionFindings
  • BARHAM, P., DRAGOVIC, B., FRASER, K., HAND, S., HARRIS, T., HO, A., NEUGEBAUER, R., PRATT, I., AND WARFIELD, A. Xen and the art of virtualization. In SOSP ’03: Proceedings of the nineteenth ACM symposium on operating systems principles (New York, NY, USA, 2003), ACM Press, pp. 164–177.
    Google ScholarLocate open access versionFindings
  • CLARK, D. W., AND STRECKER, W. D. Comments on ”the case for the reduced instruction set computer,” by Patterson and Ditzel. SIGARCH Comput. Archit. News 8, 6 (1980), 34–38.
    Google ScholarLocate open access versionFindings
  • CMELIK, B., AND KEPPEL, D. Shade: a fast instruction-set simulator for execution profiling. In SIGMETRICS ’96: Proceedings of the 1996 ACM SIGMETRICS international conference on measurement and modeling of computer systems (New York, NY, USA, 1994), ACM Press, pp. 128–137.
    Google ScholarLocate open access versionFindings
  • CRAMER, T., FRIEDMAN, R., MILLER, T., SEBERGER, D., WILSON, R., AND WOLCZKO, M. Compiling java just in time. IEEE Micro 17, 3 (1997), 36–43.
    Google ScholarLocate open access versionFindings
  • DEHNERT, J. C., GRANT, B. K., BANNING, J. P., JOHNSON, R., KISTLER, T., KLAIBER, A., AND MATTSON, J. The transmeta code morphing software: using speculation, recovery, and adaptive retranslation to address real-life challenges. In CGO ’03: Proceedings of the international symposium on code generation and optimization (Washington, DC, USA, 2003), IEEE Computer Society, pp. 15–24.
    Google ScholarLocate open access versionFindings
  • DEITEL, H. M. An introduction to operating systems (2nd ed.). Addison-Wesley Longman Publishing Co., Inc., Boston, MA, USA, 1990.
    Google ScholarFindings
  • HENNESSY, J. L., AND PATTERSON, D. A. Computer architecture: a quantitative approach. Morgan Kaufmann Publishers Inc., San Francisco, CA, USA, 2002.
    Google ScholarFindings
  • INTEL CORPORATION. Intel R Virtualization Technology Specification for the IA-32 Intel R Architecture, April 2005.
    Google ScholarFindings
  • KARGER, P. A., ZURKO, M. E., BONIN, D. W., MASON, A. H., AND KAHN, C. E. A vmm security kernel for the vax architecture. In IEEE Symposium on Security and Privacy (1990), pp. 2–19.
    Google ScholarLocate open access versionFindings
  • LEVASSEUR, J., UHLIG, V., CHAPMAN, M., CHUBB, P., LESLIE, B., AND HEISER, G. Pre-virtualization: Slashing the cost of virtualization. Technical Report 2005-30, Fakultat fur Informatik, Universitat Karlsruhe (TH), Nov. 2005.
    Google ScholarFindings
  • MCGHAN, H., AND O’CONNOR, M. Picojava: A direct execution engine for java bytecode. Computer 31, 10 (1998), 22–30.
    Google ScholarLocate open access versionFindings
  • NEIGER, G., SANTONI, A., LEUNG, F., RODGERS, D., AND UHLIG, R. Intel virtualization technology: Hardware support for efficient processor virtualization. Intel Technology Journal 10, 3 (2006).
    Google ScholarLocate open access versionFindings
  • OSISEK, D. L., JACKSON, K. M., AND GUM, P. H. ESA/390 interpretive-execution architecture, foundation for VM/ESA. IBM Systems Journal 30, 1 (1991), 34–51.
    Google ScholarLocate open access versionFindings
  • PATTERSON, D. A., AND DITZEL, D. R. The case for the reduced instruction set computer. SIGARCH Comput. Archit. News 8, 6 (1980), 25–33.
    Google ScholarLocate open access versionFindings
  • POPEK, G. J., AND GOLDBERG, R. P. Formal requirements for virtualizable third generation architectures. Commun. ACM 17, 7 (1974), 412–421.
    Google ScholarLocate open access versionFindings
  • POPEK, G. J., AND KLINE, C. S. The pdp-11 virtual machine architecture: A case study. In SOSP ’75: Proceedings of the fifth ACM symposium on operating systems principles (New York, NY, USA, 1975), ACM Press, pp. 97–105.
    Google ScholarLocate open access versionFindings
  • ROBIN, J., AND IRVINE, C. Analysis of the intel pentium’s ability to support a secure virtual machine monitor. In Proceedings of the 9th USENIX Security Symposium (2000).
    Google ScholarLocate open access versionFindings
  • SILBERSCHATZ, A., AND PETERSON, J. L., Eds. Operating systems concepts. Addison-Wesley Longman Publishing Co., Inc., Boston, MA, USA, 1988.
    Google ScholarFindings
  • SMITH, J. E., AND NAIR, R. Virtual machines: versatile platforms for systems and processes. Morgan Kaufmann Publishers, San Francisco, CA, USA, 2005.
    Google ScholarFindings
  • UHLIG, R., NEIGER, G., RODGERS, D., SANTONI, A. L., MARTINS, F. C. M., ANDERSON, A. V., BENNETT, S. M., KAGI, A., LEUNG, F. H., AND SMITH, L. Intel virtualization technology. Computer 38, 5 (2005), 48–56.
    Google ScholarLocate open access versionFindings
  • WHITAKER, A., SHAW, M., AND GRIBBLE, S. D. Scale and performance in the denali isolation kernel. SIGOPS Oper. Syst. Rev. 36, SI (2002), 195–209.
    Google ScholarLocate open access versionFindings
  • WITCHEL, E., AND ROSENBLUM, M. Embra: fast and flexible machine simulation. In SIGMETRICS ’96: Proceedings of the 1996 ACM SIGMETRICS international conference on measurement and modeling of computer systems (New York, NY, USA, 1996), ACM Press, pp. 68–79.
    Google ScholarLocate open access versionFindings
Your rating :
0

 

Tags
Comments
数据免责声明
页面数据均来自互联网公开来源、合作出版商和通过AI技术自动分析结果,我们不对页面数据的有效性、准确性、正确性、可靠性、完整性和及时性做出任何承诺和保证。若有疑问,可以通过电子邮件方式联系我们:report@aminer.cn
小科