A Multi-Stage Low-Dropout Regulator With 1 Pf Compensation Capacitor For System-On-Chip Applications

A new compensation scheme for low-dropout regulator (LDO) that requires only 1 pF on-chip capacitor is proposed in this work. The tradeoff between minimum loading current, parasitic loading capacitor and the required compensation capacitor is discussed in detail. The proposed LDO has been fabricated with AMS 0.35-mu m CMOS technology and achieves precise line and load regulation while retaining a high bandwidth larger than 2 MHz. Measurement results show that the LDO is functional with input voltage down to 1.2 V with 200 mV dropout voltage at a maximum output current of 50 mA. Due to the small compensation capacitor needed, the LDO requires no off chip capacitor and is suitable for low-power System-on-Chip power management.