Diastolic arrays: throughput-driven reconfigurable computing

ICCAD(2008)

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摘要
Diastolic arrays are arrays of processing elements that communicate exclusively through First-In First-Out (FIFO) queues. FIFO virtualization units enable relaxed timing of data transfers, and include hardware support to guarantee bandwidth and buffer space for all data transfers, which may follow composite paths through the network. We show that the architecture of diastolic arrays enables efficient synthesis from high-level specifications of communicating finite state machines so average throughput is maximized. Preliminary results are presented on an H.264 decoding benchmark.
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关键词
finite state machine,composite path,h.264 decoding benchmark,first-in first-out,efficient synthesis,throughput-driven reconfigurable computing,average throughput,buffer space,diastolic array,fifo virtualization unit,data transfer,point to point,queueing theory,systolic array,input output,relaxation time,throughput,first in first out,high throughput,routing,bandwidth,computer architecture,simulation,decoding,reconfigurable computing
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