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Cut ranking and pruning: enabling a general and efficient FPGA mapping solution

FPGA, pp.29-35, (1999)

Cited by: 181|Views121
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Abstract

Cut enumeration is a common approach used in a numberof FPGA synthesis and mapping algorithms for considerationof various possible LUT implementations at each nodein a circuit. Such an approach is very general and flexible,but often suffers high computational complexity andpoor scalability. In this paper, we develop several efficientand ...More

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Jason Cong
Jason Cong
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