Logical effort based technology mapping

ICCAD, pp. 419-422, 2004.

Cited by: 16|Bibtex|Views0|Links
EI
Keywords:
load distributionintegrated circuit designlogic design

Abstract:

We propose a new approach to library-based technology mapping, based on the method of logical effort. Our algorithm is close to optimal for fanout-free circuits, and is extended to solve the load-distribution problem for circuits with fanout. On average, benchmark circuits mapped using our approach are 25.39% faster than the solutions obt...More

Code:

Data:

Your rating :
0

 

Tags
Comments