Logical effort based technology mapping
ICCAD, pp. 419-422, 2004.
load distributionintegrated circuit designlogic design
We propose a new approach to library-based technology mapping, based on the method of logical effort. Our algorithm is close to optimal for fanout-free circuits, and is extended to solve the load-distribution problem for circuits with fanout. On average, benchmark circuits mapped using our approach are 25.39% faster than the solutions obt...More
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