A 148fsrms Integrated Noise 4 MHz Bandwidth Second-Order ΔΣ Time-to-Digital Converter With Gated Switched-Ring Oscillator.

This paper presents a second-order ΔΣ time-to-digital converter (TDC) by using a switched-ring oscillator (SRO) and a gated switched-ring oscillator (GSRO). Unlike conventional multi-stage noise-shaping (MASH) TDC using SROs, the proposed TDC does not require complex calibration to compensate for the error from frequency difference between the oscillators. Furthermore, the performance of the propo...