Novel Circuit-Level Model for Gate Oxide Short and its Testing Method in SRAMs.

IEEE Transactions on Very Large Scale Integration (VLSI) Systems(2014)

引用 7|浏览25
暂无评分
摘要
Gate oxide short (GOS) has become a common defect for advanced technologies as the gate oxide thickness of a MOSFET is greatly reduced. The behavior of a GOS-impacted MOSFET is, however, complicated and difficult to be accurately modeled at the circuit level. In this paper, we first build a golden model of a GOS-impacted MOSFET by using technology CAD, and identify the limitation and inaccuracy of...
更多
查看译文
关键词
MOSFET,semiconductor device models,SRAM chips,technology CAD (electronics)
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要