Online cache modeling for commodity multicore processors
International Conference on Parallel Architectures and Compilation Techniques, pp. 563-564, 2010.
EI
Abstract:
Modern chip-level multiprocessors (CMPs) contain multiple processor cores sharing a common last-level cache, memory interconnects, and other hardware resources. Workloads running on separate cores compete for these resources, often resulting in highlyvariable performance. It is generally desirable to co-schedule workloads that have minima...More
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