A low jitter 2.7mW/Gbps 180Gb/s 12-lane transmitter in a 40nm CMOS technology.Kamran Farzan,Mehrdad Ramezani,Angus McLaren,Roman Pahuta, Nadeesha Amarasinghe,David Cassan,Saman SadrESSCIRC（2012）引用 0|浏览4暂无评分关键词cmos integrated circuits,calibration,noise,cmos technology,transmitters,jitterAI 理解论文溯源树样例生成溯源树，研究论文发展脉络Chat Paper正在生成论文摘要
