A Sub-600-mV, Fluctuation Tolerant 65-nm CMOS SRAM Array With Dynamic Cell Biasing
IEEE Journal of Solid-State Circuits(2008)
摘要
Fluctuation limitations on scaling CMOS SRAM cell transistor dimensions and operating voltages are demonstrated by measuring local stochastic distributions of 65-nm PDSOI CMOS SRAM cell storage node voltages during read, write, and retention modes of operation. These measurements reveal insights into terminal voltage dependencies of cell margin distributions - observations that are engaged to incr...
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关键词
Fluctuations,Random access memory,Hardware,Dynamic voltage scaling,Stochastic processes,MOSFET circuits,Monitoring,Threshold voltage,Geometry,Grain size
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