A Multi-Context Pipelined Array For Embedded Systems

The integration of a reconfigurable device into complex SoCs is a common request aimed at adding software programmable efficient computational blocks to a system. In such environment a traditional approach in FPGA design could not meet the need for an easy-to-use and easy-to-integrate device. This paper presents the PiCoGA-II reconfigurable datapath which has been designed as a multi-context array to provide fast dynamic reconfiguration. Architectural choices to reduce the area overhead of this approach are described. A reconfigurable dedicated control unit provides a clear interface for an easy integration of the device together with a hardware support for a programming flow starting from a sequential high-level language. The logic cells have been redesigned with respect to the previous version, to improve their computational efficiency and flexibility. The PiCoGA-II has been fabricated in 0.13 mu m CMOS technology. The implementation of several MPEG-2 kernels shows that the multi-context array has a computational density which is 2x higher than an equivalent single-context one and is 2x higher than a Virtex-II FPGA when all the 4 contexts are utilized.