Implementation of diode and bipolar triggered SCRs for CDM robust ESD protection in 90 nm CMOS ASICs

Microelectronics Reliability(2007)

引用 22|浏览32
暂无评分
摘要
We report the characterization of diode and bipolar triggered SCRs with VFTLP measurements and product ESD testing. A dual base Darlington bipolar triggered SCR (DbtSCR) in a triple well structure is demonstrated to provide 4kV HBM, 300V MM, and 1000V CDM protection for 90nm ASIC I/Os. A very fast turn-on time of 460ps was measured for the DbtSCR, compared to 8ns for a diode triggered SCR.
更多
查看译文
关键词
CMOS integrated circuits,application specific integrated circuits,electrostatic discharge,thyristors,trigger circuits,CDM robust ESD protection,CMOS ASIC process,Darlington bipolar-triggered SCR,VFTLP measurement,diode-triggered SCR,size 90 nm,time 460 ps,
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要