Runlength Compression Techniques for FPGA Configurations
FCCM（1999）
摘要
The time it takes to reconfigure FPGAs can be a significant overhead for reconfigurable computing. In this paper we develop new compression algorithms for FPGA configurations that can significantly reduce this overhead. By using run-length and other compression techniques, files can be compressed by a factor of 3.6 times. Bus transfer mechanisms and decompression hardware are also discussed. This results in a single compression methodology which achieves higher compression ratios than existing algorithms in an off-line version, as well as a somewhat lower quality compression approach which is suitable for on-line use in dynamic circuit generation and other mapping-time critical situations.
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关键词
compression technique,runlength compression techniques,decompression hardware,new compression algorithm,fpga configuration,significant overhead,dynamic circuit generation,bus transfer mechanism,fpga configurations,single compression methodology,higher compression ratio,lower quality compression approach,hardware,reconfigurable computing,encoding,field programmable gate arrays,high performance computing,compression algorithms,compression ratio,data compression,circuits,computer architecture,compression algorithm
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