Automated Least-Significant Bit Datapath Optimization For Fpgas
FCCM '04: Proceedings of the 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines（2004）
摘要
In this paper we present a method for FPGA datapath precision optimization subject to user-defined area and error constraints. This work builds upon our previous research [1] which presented a methodology for optimizing for dynamic range-the most significant bit position. In this work, we present an automated optimization technique for the least-significant bit position of circuit datapaths. We present results describing the effectiveness of our methods on typical signal and image processing kernels.
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关键词
adders,circuit optimisation,error analysis,field programmable gate arrays,image processing,simulated annealing,FPGA datapath precision optimization,automated optimization,circuit datapaths,error constraints,image processing kernels,least significant bit problem,signal processing kernels,
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