Guiding a physical design closure system to produce easier-to-route designs with more predictable timing
DAC(2012)
摘要
Physical synthesis has emerged as one of the most important tools in design closure, which starts with the logic synthesis step and generates a new optimized netlist and its layout for the final signoff process. As stated in [1], "it is a wrapper around traditional place and route, whereby synthesis-based optimization are interwoven with placement and routing." A traditional physical synthesis tool generally focuses on design closure with Steiner wire model. It optimizes timing/area/power with the assumption that each net can be routed with optimal Steiner tree. However, advanced design rules, more IP and hierarchical design styles for super-large billion-gate designs, serious buffering problems from interconnect scaling and metal layer stacks make routing a much more challenging problem [2]. This paper discusses a series of techniques that may relieve this problem, and guide the physical design closure system to produce not only easier to route designs, but also better timing quality. Open challenges are also overviewed at the end.
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关键词
better timing quality,super-large billion-gate design,logic synthesis step,hierarchical design style,physical design closure system,easier-to-route design,advanced design rule,predictable timing,physical synthesis,steiner wire model,design closure,traditional physical synthesis tool,physical design,steiner tree,logic design,metals,optimization,network routing,logic gates,design rules,routing,network synthesis,logic synthesis,place and route
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