Architecture evaluation for power-efficient FPGAs

    FPGA, pp. 175-184, 2003.

    Cited by: 210|Bibtex|Views19|Links
    EI
    Keywords:
    power modeldifferent fpga componentmixed-level fpga power modelcycle-accurate power simulatorglitch powerMore(10+)

    Abstract:

    This paper presents a flexible FPGA architecture evaluation framework, named fpgaEVA-LP, for power efficiency analysis of LUT-based FPGA architectures. Our work has several contributions: (i) We develop a mixed-level FPGA power model that combines switch-level models for interconnects and macromodels for LUTs; (ii) We develop a tool that ...More

    Code:

    Data:

    Your rating :
    0

     

    Tags
    Comments