Data Partitioning And Optimizations For Reconfigurable Architectures

Contemporary reconfigurable architectures integrate distributed block RAM modules on-chip to provide ample storage for DSR wireless, and image processing applications. Synthesizing applications to these complex systems requires an effective and efficient approach to conduct data partitioning and storage assignment. This work showed that different data partition schemes and storage assignment solutions, integrated with other memory optimization techniques, dramatically improve overall system performance. Experimental results indicated that partitioned designs could meet design goals and achieve much better performance.