An Improved P-Admissible Floorplan Representation Based On Corner Block List

ASPDAC(2005)

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摘要
The Corner Block List representation (CBL) introduced in 2000 is an efficient and effective model for floorplanning and placement while still having some limitations such as redundancy and incompleteness. In this paper, we present an auxiliary 3-Route Model to eliminate the redundancy and insert empty rooms to resolve the incompleteness. Finally we attain a P-admissible representation ECBL(2) which has higher performances than the original CBL and the count of its solution space is O((2n)!2(6n)/n!n(4)).
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关键词
VLSI,computational complexity,integrated circuit modelling,redundancy,auxiliary 3-route model,corner block list,effective model,efficient model,improved P-admissible floorplan representation,incompleteness limitations,redundancy limitations,
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