Design-For-Test Methods For Stand-Alone Srams At 1gb/S/Pin And Beyond

Herold Pilo,Stu Hall,Patrick Hansen,Steve Lamphier,Chris Murphy

ITC '00 Proceedings of the 2000 IEEE International Test Conference（2000）

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摘要

Design-for-test techniques for wafer test, component test and system-level diagnostics are implemented on stand-alone SRAMs at 1Gb/s/pin. These design-for-test techniques achieve several objectives: improved tester measurement accuracy, higher component yield, and optimal system-level SRAM performance.

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关键词

control systems,design for test,frequency,system on a chip,system testing,design for testability

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