An analytical model of the overshooting effect for multiple-input gates in nanometer technologies

Li Ding,Jing Wang,Zhangcai Huang,Atsushi Kurokawa,Yasuaki Inoue

ISCAS（2013）

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摘要

The overshooting effect, which is induced by the input-to-output coupling capacitance, has an significant effect on CMOS gate delay with the scaling of CMOS technology. In this paper, an effective analytical model is proposed to calculate the overshooting time of multiple-input gates. The proposed model is verified having a good agreement with SPICE simulation results.

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关键词

spice simulation,overshooting effect,integrated circuit modelling,nanometer technologies,multiple-input gates,cmos gate delay,cmos logic circuits,logic gates,nanoelectronics,cmos integrated circuits,semiconductor device modeling,simulation

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