A 64Gb 533Mb/s DDR interface MLC NAND Flash in sub-20nm technology.Daeyeal Lee,Ik Joon Chang,Sangyong Yoon,Joonsuc Jang,Dong-Su Jang,Wook-Ghee Hahn,Jong-Yeol Park,Doo-Gon Kim,Chiweon Yoon,Bong-Soon Lim,ByungJun Min,Sung-Won Yun,Ji-Sang Lee,Il-Han Park,Kyung-Ryun Kim,Jeong-Yun Yun,Youse Kim,Yong-Sung Cho,Kyung-Min Kang,Sang-Hyun Joo,Jin-Young Chun,Jung-No Im, Seunghyuk Kwon,Seokjun Ham,Ansoo Park,Jae-Duk Yu,Nam-Hee Lee,Tae-Sung Lee,Moosung Kim,Hoosung Kim,Ki-Whan Song,Byung-Gil Jeon,Kihwan Choi,Jin-Man Han,Kyehyun Kyung,Youngho Lim,Young-Hyun JunISSCC(2012)引用 48|浏览112暂无评分关键词interference,pipelines,computer architecture,bit error rateAI 理解论文溯源树样例生成溯源树,研究论文发展脉络Chat Paper正在生成论文摘要