A 1-to-6Gb/s phase-interpolator-based burst-mode CDR in 65nm CMOS.
ISSCC（2011）
关键词
CMOS integrated circuits,clock and data recovery circuits,frequency locked loops,interpolation,passive optical networks,phase locked loops,voltage-controlled oscillators,PLL frequency,bit rate 1 Gbit/s to 6 Gbit/s,bit rate 10 Gbit/s,clock-forwarding link,consecutive identical digit,frequency locking,gated VCO,injection locking,passive optical network,phase-lnterpolator-based burst-mode clock and data recovery circuit,size 65 nm
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