A 20-GHz Phase-Locked Loop for 40-Gb/s Serializing Transmitter in 0.13-$muhboxm$CMOS

J. Kim,J.-K. Kim, B.-J. Lee,N. Kim,D.-K. Jeong, W. Kim

IEEE Journal of Solid-State Circuits(2006)

引用 98|浏览2
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摘要
A 20-GHz phase-locked loop with 4.9 ps/sub pp//0.65 ps/sub rms/ jitter and -113.5 dBc/Hz phase noise at 10-MHz offset is presented. A half-duty sampled-feedforward loop filter that simply replaces the resistor with a switch and an inverter suppresses the reference spur down to -44.0 dBc. A design iteration procedure is outlined that minimizes the phase noise of a negative-g/sub m/ oscillator with ...
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关键词
Phase locked loops,Transmitters,Phase noise,Switches,Frequency conversion,Jitter,Resonator filters,Resistors,Inverters,Oscillators
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