Placement with Incomplete Data

VLSI DESIGN, pp. 57-70, 1999.

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Abstract:

Traditional placement problems are studied under a fully specified cell library and a complete netlist. However, in the first, e.g., 2 years of a 2 - 3 year microprocessor design cycle, the detailed netlist is unavailable. For area and performance estimation, layout must nevertheless be done with incomplete information. Another source of ...More

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