Automatic generation of FPGA routing architectures from high-level descriptions

    FPGA, pp. 175-184, 2000.

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    flat fpga architecturearchitecture generatorhigh-level descriptionfpga routingfpga architectMore(10+)

    Abstract:

    In this paper we present a “high-level” FPGA architecture description language which lets FPGA architects succinctly and quickly describe an FPGA routing architecture. We then present an “architecture generator” built into the VPR CAD tool [1, 2] that converts this high-level architecture description into a detailed and completely specifi...More

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