Towards a more principled compiler: register allocation and instruction selection revisited

Backend optimizations are a critical part of an optimizing compiler. This thesis develops a principled approach for understanding, evaluating, and solving backend optimization problems. Our principled approach is to develop a comprehensive and expressive model of the backend optimization problem, and design solution techniques for this model that achieve or approach optimality. We apply our principled approach to the classical backend optimizations of register allocation and instruction selection. We develop an expressive model of register allocation based on multi-commodity network flow. This model exactly represents the complexities of the target architecture. We design progressive solution techniques for our model. Progressive solution techniques quickly find an initial solution and then improve upon the solution as more time is allotted for compilation. Our progressive allocator allows the programmer to explicitly manage the trade-off between compile-time and code quality. As more time is allowed for compilation, the resulting allocation approaches optimal, and substantial improvements in code quality are obtained. We describe an expressive directed acyclic graph representation of the instruction selection problem and develop a near-optimal, linear-time algorithm that solves the instruction selection problem using this expressive model. Our principled approach to instruction selection results in significant improvements in code quality compared to traditional algorithms. We evaluate our principled approaches to register allocation and instruction selection on a range of architectures and benchmarks. We achieve significant reductions in code size and increases in performance relative to previous approaches. Our results confirm that our principled approach is a major advance in the state of the art of backend optimization.