Intel® version of STAC-A2 benchmark: toward better performance with less effort

WHPCF@SC(2013)

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摘要
Market risk analysis is a computationally intensive problem which requires powerful computing resources. To enable consistent comparisons of vendors' technologies in this area the Securities Technology Analysis Center (STAC*), with inputs from leading trading companies, universities, and high performance computing vendors, has created STAC-A2* specifications which describe realistic market risk analysis workloads. In this paper we analyze and compare the performance of STAC-A2 workloads on two systems based on Intel® processors: Intel® Xeon® processor E5 family and Intel® Xeon Phi™ coprocessor. We show the importance of algorithmic optimizations and a few mathematical building blocks such as random number generation, mathematical functions and matrix multiplications on overall performance of the benchmark. We demonstrate that changes made in response to this analysis provide an additional ~1.6x performance improvement of the STAC-A2 benchmark on the Intel Xeon processor E5 family and up to ~15x performance improvement on Intel Xeon Phi coprocessor-based systems compared with the previous version of the benchmark. Intel Xeon Phi coprocessor architecture is ~1.10--1.38x faster than 16-core Intel Xeon processor E5 family-based systems, depending on the problem size, while the 32-core Intel Xeon processor E5 is the fastest among all analyzed platforms.
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intel xeon phi coprocessor,e5 family,stac-a2 benchmark,32-core intel xeon processor,16-core intel xeon processor,intel xeon processor,xeon phi,performance improvement,high performance computing vendor,intel xeon phi,better performance,overall performance,market risk,greeks
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