Dual-LFSR Reseeding for Low Power Testing

Microprocessor Test and Verification(2012)

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摘要
Large test data volume and excessive test power are two strict challenges for VLSI testing. This paper presents a BIST scheme adopting dual-LFSR reseeding method to effectively reduce the amount of test data while keeping the scan-in power as low. Experimental results show that, compared with the similar work, test data volume can be significantly reduced with a roughly equal scan-in power reduction.
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关键词
large test data volume,test data,bist scheme,test data volume,low power testing,dual-lfsr reseeding,scan-in power,vlsi testing,excessive test power,dual-lfsr reseeding method,equal scan-in power reduction,vlsi
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