Copper pillar interconnect capability for mmwave applications in 3D integration technology

3D integration technology opens the way of heterogeneous silicon platform, as for example, millimeter-wave functionalities could be integrated in future communication modules. Consequently, copper pillar technology realized at 1st level of interconnection between silicon top dies and silicon interposer must be evaluated in this new frequency range. In this paper, a test vehicle has been designed to assess radio frequency behavior of 3D stacking as insertion losses (IL) up to 40GHz induce by copper pillar interconnection and assembly parameters (pitch, underfilling,...). Copper pillar ground-signal-ground (GSG) vertical transition exhibits IL lower than 0.2dB at 40GHz on high resistive silicon substrate and seems to be the minor contributor of all 3D interconnections as TSV, and RDL. Capillary underfill and GSG transition pitch have been evaluated to have a weak impact. Cu ring designed to limit bleed-out and fillet assures PAD integrity and induces a strong signal reflection above 15GHz. Finally, process assembly robustness of high aspect ratio top die (10x3mm^2) has been assessed with DC measurements.